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FdcHardwareInterface

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FDC/DMA hardware interface


The hardware interface of FDC is composed of two adresses for FDC/DMA interface and three adresses for the DMA pointer, which is split into 3 bytes. Please note that selection of drive and side is done into the SoundGenerator? register #14.


DMA pointer

The DMA pointer is set by the programmer to tell the DMA where to read data to be written on disk (FDC write commands) and where to write data that is to be read from disk (FDC read commands). This 24-bit pointer is split into 3 separate bytes as follows:

Address Data format Access Access to
0x00FF8609 Byte R/W DMA pointer higher byte
0x00FF860B Byte R/W DMA pointer medium byte
0x00FF860D Byte R/W DMA pointer lower byte

Warning

When setting the DMA pointer, the lower byte should be set first, the higher byte last.

Caveats

As you can guess, the DMA pointer is limited to 24 bits, so DMA can't access RAM that would be above the 16MB limit. This means that in case you machine has TT RAM (also called alternate memory) above 16MB, then a specific driver will be necessary for your applications to be able to put data from disk to TT RAM. This means that older application accessing the FloppyDrive directly through this hardware interface (without using the operating system, which is absolutely not recommended) won't be able to load data from disc to TT RAM.


Drive and Side selection

The selection of side 1 or 2 and drive A: or B: is done in the rgister #14 of the SoundGenerator? chip. To access this register, you first have to write 0x0E at 0x00FF8800.

Bit Function Meaning
#0 Side selection 1: Side 1 selected, 0: Side 2 selected
#1 Drive #0 selection (internal A: drive) 1: Drive #0 not selected, 0: Drive #0 selected
#2 Drive #1 selection (external B: drive) 1: Drive #1 not selected, 0: Drive #1 selected

Caveats

Be carefull that these bits are set to 1 by default, which is the usual unselected state for FloppyDisc? signals. Thus, selection is made when clearing the considered bits to 0.


FDC/DMA interface

FDC/DMA interface is composed of two addresses used to control the DMA and access the various FDC registers.

Address Access Available bits Access to
0x00FF8604 Read FEDCBA98 76543210
________ XXXXXXXX
One of the FDC registers (depending on AA bits),
or the Sector Count register (if C bit is set to 1)
0x00FF8604 Write FEDCBA98 76543210
________ XXXXXXXX
One of the FDC registers (depending on AA bits),
or the Sector Count register (if C bit is set to 1)
0x00FF8606 Read FEDCBA98 76543210
________ _____RSE
Status Register for FDC and DMA
0x00FF8606 Write FEDCBA98 76543210
_______W FD_CHAA_
Control Register for FDC and DMA

FDC/DMA status bits

Bits that are read from the Status Register at 0x00FF8606 have the following meaning:

Bit Meaning
#0: R Data Request inactive
#1: S Sector count status
#2: E DMA Error status

FDC/DMA control bits

When writing in the Control Register at 0x00FF8606, bits have the following meaning:

Bit Meaning
#0: Reserved None
#1 & #2: AA FDC register selection when accessing 0x00FF8604. See below for the meaning of these two bits.
#3: H (_CS) H=1: Hard drive / H=0: Floppy disk
#4: C C=1: Select Sector Count register / C=0: Select FDC/DMA registers
#5: Reserved None
#6: D D=1: DMA active / D=0: DMA inactive
#7: F (_DRQ) F=1: DMA works with Floppy drive / F=0: DMA works with hard drive
#8: W W=1: DMA Writes to memory / W=0: DMA reads from memory

When C=0 (bit #4 of the Control Register cleared), bits AA of the Control Register let you select which FDC register will be accessed at 0x00FF8604. When AA=00, two different registers are accessed when reading or writing. Available registers are listed below:

Value Access Accessed register
AA=00 Read Status Register
AA=00 Write Command Register
AA=01 Read/Write Track Register
AA=10 Read/Write Sector Register
AA=11 Read/Write Data Register

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